CTIA / GTIA Pinout Diagram

A vector graphic pinout is also available in Encapsulated PostScript format.

Key

• A0-A4: Address bus
• D0-D7: Data bus
• AN0-AN2: ANTIC data input (see below)
• Vcc: +5V power
• T0-T3: Joystick trigger inputs
• S0-S3: Console buttons - Start, Select, Option, ?
• PAL: PAL/NTSC indicator (R/W direction unknown)
• DEL (CAD3 in the diagram): Color delay line adjustment
• COLOR: Color frequency output (to TV modulator?)
• LUM0-LUM3: Luminance output (to TV modulator?)
• CSYNC: Composite sync output
• HALT: Signals the GTIA chip to pull player/missile graphic data from the data bus during horizontal blank, if p/m DMA is enabled (GRACTL). (As a reminder, ANTIC also uses HALT to suspend the CPU while it is reading memory.)
• Vss: Ground
• OSC: Input clock?
• FØ0: Fast phase clock output to ANTIC
• Ø2: Phase 2 clock input
• CS: Chip select
• R/W: Read/write direction

The ANTIC input data is interpreted as follows:

In the GTIA modes, it takes two clock cycles to load all 4 bits of data for each pixel. GTIA will load the first two bits during one clock, and the next two bits at the second clock. In 16-luminance or 16-color modes, the reconstituted value is OR'ed with the background color to get the final pixel color. In 9-color mode, the reconstituted value indexes the color value to use (see GTIA Mode).

When DMA'ing player/missile data, the CTIA/GTIA chip passively looks at the data bus during horizontal blank. It is up to ANTIC to address player/missile data in main memory (i.e., ANTIC sets the address bus, but GTIA reads the data bus.). The timing is as follows: during horizontal blank, ANTIC asserts HALT on the GTIA chip at clock T0. (This also suspends the CPU so that ANTIC can access memory.) At T1 (the next clock cycle), missile data for the current line is read (on lines D7-D0). Nothing happens at T2. During T3-T6, data for players 0-3 are read in turn.

The effect of the DEL output pin is to delay the leading edge of the chrominance signal, thus effecting a specific color (see video notes.) The specific delay is engineered to be 146+21C nanoseconds, where C is a non-zero color value. Since the chrominance signal has a wavelength of 279.3 ns, this gives us the phase offset as 188.18º+27.06ºC. Yes, this covers a range >360º, but you'll notice there is an overlap in the color table (yellow is near colors 1 and 14).

Note: The information here is more fully documented in Atari's technical documents.

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