Source: Mapping the Atari, by Ian Chadwick
D300: PORTA D301: PORTB D302: PACTL D303: PBCTL
Reads or writes data from or to the game controller jacks one and two if bit 2 of PACTL is set. Writes directional control bits if bit 2 of PACTL is clear. Clearing a directional control bit will set that line for input (the default for using joysticks.) Setting a directional control bit will set that line for output.
The arrangement of the bits in relation to the controllers are as follows:
|Jack||Player 2||Player 1|
On the Atari 400 and Atari 800, PORTB is exactly the same as PORTA, controlling players 3 and 4.
On the XL series of computers, PORTB has been changed to a memory and LED control register (read/write):
|Self Test ROM||Reserved||LED #2||LED #1||BASIC ROM||OS ROM|
Self Test ROM: If set, RAM is enabled for the address range $5000-$57FF. If clear, the self-test ROM (which is physically located at $D000-$D7FF, under the hardware registers) is remapped to this memory area.
LED #n: If set, the corresponding LED is turned off. If clear, the LED will be on. (1200XL only.)
BASIC ROM: If set, RAM is enabled for the address range $A000-$BFFF. If clear, the built-in BASIC ROM is enabled at this address. And if there is a cartridge installed in the computer, it makes no difference.
OS ROM: If set, the built-in OS is enabled, and occupies the address range $C000-$FFFF (except that the area $D000-$D7FF will only access the hardware registers.) If clear, RAM is enabled in this area (again, save for the hole.)
On the XE series of computers, PORTB is a bank-selected memory control register (read/write):
|Self Test ROM||Reserved||ANTIC Bank Switch||CPU Bank Switch||Bank Select||BASIC ROM||OS ROM|
Self Test ROM: This is the same as the XL series.
ANTIC Bank Switch: If set, the ANTIC chip will access bank-switched memory mapped to the address range $4000-$7FFF. If clear, ANTIC will see normal memory in this region.
CPU Bank Switch: If set, the CPU will access bank-switched memory mapped to the address range $4000-$7FFF. If clear, the CPU will see normal memory in this region.
Bank Select: These bits determine which memory bank is visible to the CPU and/or ANTIC chip when their Bank Switch bit is set. There are four possible banks of 16KB each.
BASIC ROM: This is the same as the XL series.
OS ROM: This is the same as the XL series.
|IRQ Status||0||1||1||Motor Control||Data / Direction||0||IRQ Enable|
IRQ Status: This bit is set when peripheral A generates an interrupt. It is cleared by reading PORTA.
Motor Control: Used by the Program Recorder (cassette drive). If set, the motor is turned off. If clear, the motor is turned on.
IRQ Enable: If set, enables interrupts from peripheral A. If clear, interrupts are disabled.
|IRQ Status||0||1||1||SIO Command||Data / Direction||0||IRQ Enable|
IRQ Status: This bit is set when peripheral Bgenerates an interrupt. It is cleared by reading PORTB.
SIO Command: Peripheral command identification.When cleared, serial devices are alerted that the following data will be a command.
IRQ Enable: If set, enables interrupts from peripheral B. If clear, interrupts are disabled.