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Evans & Sutherland ESV Workstation

From the ESV Workstation User's Manual, 1991:

Product Overview

The ESV Series Workstations are UNIX-based, high-performance, 3D graphics workstations, engineered to support applications in molecular modeling, industrial/automotive design, and design engineering and analysis. The ESV Series Workstations support the image quality and performance requirements of these applications.

The ESV Series Worsktations are available in several models that can be tailored to meet individual customer's needs. Model numbers reflect various graphics performance configurations. [...] Each configuration represents both a physical configuration and a level of performance outlined below:

Model 5-pixel vec/sec 10-pixel vec/sec tri/sec quad/sec
ESV 3 360,000 360,000 33,000 19,000
ESV 10 525,000 525,000 50,000 28,000
ESV 20 860,000 680,000 82,000 45,000
ESV 30 1,060,000 680,000 115,000 62,000
ESV 40 1,100,000 680,000 147,000 78,000
ESV 50 1,100,000 680,000 172,000 100,000

Model numbers have a suffix indicating the CPU performance:

Suffix Clock Rate MFLOPs Dhrystone-MIPS VAX-MIPS Dhrystones 1.1
/32 25 MHz 4 24 20 41,000
/33 33 MHz 5.28 32 26 52,000

Hardware Overview

The ESV Workstation's CPU is implemented with a 25 MHz MIPS R3000 RISC microprocessor or a 33 MHz MIPS R3000A RISC microprocessor. The CPU is central to the system, and it ties together the system's two global busses: the VMSbus and the GBus (a proprietary bus used by the graphics subsystem). The CPU is capable of accessing devices on either the Gbus or the VMEbus. Both the graphics subsystem and the CPU are expandable for performance. ESV models 3 and 10 come standard in the small cabinet (7-slot). Other models come standard in the large cabinet which has 14 card slots including four VME and four graphics expansion slots.

The three major subsystems in the ESV workstation (CPU, Graphics, and VME I/O) are all clock-independent. There is a total of 128 Kbyte of high-speed cache memory. System memory ranges from 8 Mbytes up to 128 Mbytes.


The standard hardware configuration is listed below:

  • MIPS R3000 processor (25 MHz or 33 MHz),
  • Ethernet controller with TCP/IP,
  • Two additional RS-232 ports,
  • One keyboard port,
  • One mouse port,
  • SCSI support for internal and external peripherals,
  • 19-inch raster monitor,
  • ESV graphics card set,
  • Optical mouse,
  • Alphanumeric keyboard,
  • VMEbus.

The graphics subsystem consists of a command FIFO filled by the CPU with a stream of commands. The command stream is dispersed to any one of up to 44 AT&T DSP32C signal processing chips. The model number roughly correlates to the number of DSP chips in the system, with four in the base ESV/3 and 44 in the ESV/50. In my collection I have an ESV/10 and an ESV/50. The DSP chips perform vertex processing operations and produces a command-stream for the custom ASIC pixel processor chip that is connected to the 88-bit deep frame buffer. The pixel processor command stream handled 2D Blit operations and antialiased rasterization of point, line and span primitives. A 'span' primitive is an aliased line used for scan conversion of polygon primitives. The polygons are rasterized into a series of spans by the DSP chips.